It should be understood that the term "light modulating devices" is used in this specification to encompass both light transmissive modulators, such as diffractive spatial modulators, and light emissive modulators, such as conventional liquid crystal displays.
Ferroelectric liquid crystal displays (FLCD's) are considered as suitable candidates for large sized high content display panels, for use in high definition television (HDTV), since they have characteristics, such as memory effect characteristics, fast response time and wide viewing angle, which make them attractive for such applications.
HDTV displays typically require approximately 1,000 scanning lines, all the lines being scanned sequentially within a short frame time to allow frame repetition rates of the order of 70 frames per second. Although FLCD's have much faster response times than conventional nematic liquid crystal displays, ferroelectric liquid crystal (FLC) materials are not always fast enough for 1,000 lines to be scanned within a frame time, and additionally FLC typically exhibits only two stable states corresponding to the black state and the white state, for example. HDTV displays require greyscale, and this may be produced in a number of ways. For example, in the so-called temporal dither (TD) technique, display data is applied to the pixel during two or more consecutive sub-frames within the normal addressing frame time so as to enable the state of the pixel to be separately controlled within each sub-frame, with the result that the temporal average over the whole frame time can represent a grey level between the black and white states. However, because of the increased switching frequency required by such a technique, the number of sub-frames, and hence the number of grey levels obtainable, is restricted by the switching speed of the FLC and/or the power available.
In the so-called spatial dither (SD) technique, which may be used in place of or in addition to TD, the pixel is divided into two or more separately switchable subpixels, which may be of different sizes. The subpixels may each be placed in either the black state or the white state so that the spatial average of the states of the subpixels can represent a grey level between the black and white states. As is well known, the pixels of such a display are commonly addressed by data signals applied to data or column electrodes and strobe signals applied to strobe or row electrodes, which cross the column electrodes so as to define the individual pixels at the intersections of the electrodes, the state of each pixel being determined by the resultant of the data and strobe signals. Furthermore, in the case of a color display, each pixel may be divided into three color subpixels which are generally addressed by splitting each column electrode into three subelectrodes to which separate color data signals are applied. It will be appreciated that the number of subpixels which may be provided for SD or color is restricted by the permissible interconnect density and cost of associated driver circuitry, as well as limitations in the FLC switching speed. In the case of a color display, the restrictions imposed by interconnect density and the driver circuitry are far less stringent for the row electrodes than for the column electrodes since the column electrodes will need to be subdivided to address the color subpixels.
Japanese Patent Publication No. 189622/1991 discloses an arrangement in which each row or strobe electrode is divided into a plurality of subelectrodes which are connected to strobe driver circuitry by resistances of different values such that, for a particular strobe electrode, a subelectrode connected by way of a lower resistance is scanned simultaneously by the same strobe voltage as a subelectrode connected by way of a higher resistance and, due to the difference in these resistances, different voltage drops and/or phase delays are applied so that the effective strobe voltages of the two subelectrodes differ from one another. This technique may be used to decrease the number of drive circuits where the strobe electrodes are divided into subelectrodes, such as in a SD arrangement. However such resistances increase the phase delays to the strobe signals propagated along the electrodes, and consequently a larger line address time (LAT) may be needed in order to ensure switching of the pixels at the remote ends of the electrodes.
Furthermore such an arrangement does not allow fully independent control of the subelectrodes. For example, if such an arrangement is to be used for controlling the states of two subpixels of different sizes for control of grey level by the SD technique, it is only possible to obtain three out of the four possible combinations of states of the two subpixels. The combinations black-black, black-white and white-white are obtainable, whereas the combination white-black is not obtainable. Where the subpixels are of different sizes, this means that one of the possible grey levels is not obtainable.
Japanese Patent Publication No. 50278/1996 discloses a driving scheme for addressing a plurality of electrodes simultaneously. However this driving scheme requires data voltages of different amplitudes, which results in different FLC memory angles in the pixels. Again it is not possible to achieve complete independence of control of those electrodes which are scanned simultaneously in such an arrangement.
Japanese Patent Publications Nos. 27719/1993 and 27720/1993 describe a technique in which each strobe electrode is divided into two subelectrodes which are scanned simultaneously, one of the subelectrodes being first blanked black while the other subelectrode is first blanked white, and the two subelectrodes being scanned with pulses of opposite polarity while data is applied to select the state of each subpixel to obtain the required greyscale. Any local temperature variation has opposite effects in the two subelectrodes tending to cancel the temperature dependence of the grey level. Such a technique allows a substantially error free half analogue grey level to be obtained.